Effect of die metallization layer ageing in the case of power semiconductor devices
POMMIER ; LEFEBVRE ; PIETRANICO ; BERKANI ; KHATIR ; BONTEMPS ; CADEL
Type de document
ARTICLE A COMITE DE LECTURE NON REPERTORIE DANS BDI (ACLN)
Langue
anglais
Auteur
POMMIER ; LEFEBVRE ; PIETRANICO ; BERKANI ; KHATIR ; BONTEMPS ; CADEL
Résumé / Abstract
The paper describes ageing mechanisms of the metallization layer deposited on the chips of power semiconductor devices, and the effects of its ageing on the electrical characteristics of a COOLMOSTM Transistor. We have tried to link the changes in electrical performances to the metallization degradation, in order to better understand the origin of the physical mechanisms of ageing and the effects of the degradation of the metallization layer on electrical performances of tested devices.
Source
European Journal of Electrical Engineering, num. 5, pp.569-585 p.
Editeur
LAVOISIER
